Interposers are used for integrated circuit packaging, typically for routing connections between semiconductor dies and packaging components. For example, semiconductor dies typically have tightly-spaced bonding pads, which may be inconvenient for being bonded onto package substrates. Interposers are thus used to increase the pitches of the semiconductor dies. In this case, interposers each have a first side having copper posts with smaller pitches corresponding to semiconductor dies, and a second side with bonding pads having greater pitches than that of the copper posts.
Conventionally, the interposers are formed using organic materials, ceramics, and the like. Recently, interposers having silicon as the base material are being explored. Silicon interposers have the advantageous features of having the same coefficient of thermal expansion as the silicon substrates in the semiconductor dies. Therefore, smaller stresses are generated between the silicon interposers and the silicon-containing semiconductor dies. In addition, existing technologies are mature enough for forming ultra-thin silicon wafers. However, problems arise in the processing of silicon interposers when the thicknesses of the interposers are reduced to about 5 mils or less, particularly in the future-generation integrated circuits. Such interposer wafers are too thin to handle using conventional packaging techniques.
One method for the handling of ultra-thin interposer wafers is attaching glass wafers using ultra-violet (UV) tapes, and removing the glass wafers after the dies have been attached on the interposer wafers. However, the subsequent reflow process for attaching dies requires temperatures as high as 400° C., which are too high for the UV tape. Accordingly, a new method for handling ultra-thin interposer wafers is needed.